\ 2011-07-13  adv9_1.fs

\ ..;....1....;....2....;....3....;....4....;
\ load these once
\ amforth-upload.py  -t /dev/ttyUSB0 \
\   lib/misc.frt lib/bitnames.frt \
\   lib/ans94/marker.frt atmega32.frt

\ #include lib/misc.frt
\ #include lib/bitnames.frt
\ #include lib/ans94/marker.frt
\ #include atmega32.frt

marker --start--

PORTC 2 portpin: _rfm12 \ requires -jtag
PORTB 5 portpin: _mosi
PORTB 6 portpin: _miso
PORTB 7 portpin: _clk

\ /ss +spi -spi ><spi
\ --- include begin spi.fs
\ 2010-05-24  EW   ewlib/spi.fs
\ spi, using hw interface
\ needs in dict_appl.inc: .include "words/spirw.asm"

\ words:
\     +spi   ( -- )
\     -spi   ( -- )
\     ><spi  ( x -- x' )   transfer 2 bytes

\ Needs at least these definitions
\ SPI
\ $2D constant SPCR        \ SPI Control Register
\ $2F constant SPDR        \ SPI Data Register
\ $2E constant SPSR        \ SPI Status Register

\ needs lib/bitnames.frt   \ port_pin: high low pin_{out,in}put
\ ----------------------------------------------------------

\ SPCR (control register)
\ . 7 SPIE   spi interrupt enable
\ . 6 SPE    spi enable
\ . 5 DORD   data order, 0 msb first
\ . 4 MSTR   master/slave mode, 1 master
\ . 3 CPOL   clock polarity, 0 clock low on idle
\ . 2 CPHA   clock phase,    0 sample on leading edge
\ . 01 SPIR  data rate, 00 f/4, 01 f/16, 10 f/64, 11 f/128
\ SPE | MSTR | SPIR0  ==> $51

\ needs these defined before loading:
PORTB 4 portpin: /ss
\ PORTB 5 portpin: _mosi
\ PORTB 6 portpin: _miso
\ PORTB 7 portpin: _clk

: +spi ( -- )
  /ss high \ activate pullup!
  _mosi high _mosi pin_output
  _clk  low  _clk  pin_output
\  _miso pin_pullup_on  \ not needed, see datasheet
  $53 SPCR c! \ enable, master mode, f/128 data rate
;
: -spi  0 SPCR c! ;

\ transfer 1 byte
\ use spirw ( c -- c' )

\ transfer 1 cell
: ><spi ( x -- x' )
  dup  >< spirw
  swap    spirw
  swap >< +
;

\ fin\ --- include end spi.fs
\ +rfm12 rfm12.init
\ >wc wc? w? >w <w w.status
\ --- include begin rfm12.fs
\ 2011-05-29  EW  ewlib/rfm12.fs
\                               \ +rfm12 rfm12.init
\                               \ >wc wc? w? >w
\ wait for wireless data tx ready
: w? ( -- ) _rfm12 low begin _miso pin_high? until ;
\ write 1 cell to wireless control
: (>wc) ( x -- x' ) _rfm12 low ><spi _rfm12 high ;
\ write wireless control, drop reply
: >wc ( x -- )    (>wc) drop ;
\ read wireless status
: wc? ( -- x )  0 (>wc)      ;
: w.status wc? 4 hex u0.r ;

\ write wireless data
: >w ( c -- )   $00ff and $b800 +   w? (>wc) drop ;
\ read one byte
: <w ( -- c )   $b000               w? (>wc) ;

: +rfm12
  _rfm12 low _rfm12 pin_output
;
: rfm12.init
  \ read status register
\  wc? drop
  \ init sequence
  $80d7 >wc
  $82d9 >wc \ 
\ $a67c >wc \ 434.150 MHz;  Band Mitte: 433.920 MHz
  $a6b8 >wc \ 434.300 MHz
\ $a530 >wc \ 433.620 MHz
  $c647 >wc \ 4800 baud
  $94a0 >wc \ bandwith: 134 kHz
\ $9480 >wc \           200 kHz
  $c2ac >wc
  $ca81 >wc
  $c483 >wc \ AFC
\ $c400 >wc \ AFC test without
  $9854 >wc \ (5+1)*15 = 90 kHz Hub, -12dB
\ $9857 >wc \ (5+1)*15 = 90 kHz Hub, -21dB
\ $9894 >wc \ (9+1)*15 = 150 kHz
  $e000 >wc
  $c800 >wc
  $c000 >wc
;

\ Sende/Empfangsfrequenz
\ f = 10 * C1 * ( C2 + F/4000 ) [MHz]
\ 434 MHz: C1 = 1  C2 = 43
\ F:  96 <= F <= 3903
\ 
\ f = 10 * 1 * ( 43 +  F[0..11]/4000 )
\     10     * ( 43 +  $06b8/4000 )
\     10     * ( 43 +   1720/4000 )
\   = 434.300 MHz
\ f:  430.24 <= f <= 439.75 [MHz]
\ hub: Df = (M[0..3] + 1) * 15 kHz

\ --- include end rfm12.fs

\ --- station 0x72 ---
PORTA 7 portpin: _w_pwr
: rfm12.power.on  _w_pwr high  _w_pwr pin_output  ;
: rfm12.power.off _w_pwr pin_highZ                ;


\ --- rfm12 ---
: rfm12.rx   $82d9 >wc ;
: rfm12.off  $8201 >wc ;

: rfm12.rx.all \ no sync
  -jtag
  +spi +rfm12
  rfm12.init w.status cr
  rfm12.rx
  $ca87 >wc \ ???
  hex
  begin
    <w 2 u0.r space
  key? until
  key drop
  rfm12.off
;


: rfm12.tx.on  ( -- )  $8238    >wc ;
: rfm12.tx.off ( -- )  $8208 w? >wc ;

: init
  -jtag
  +spi +rfm12
  rfm12.init
  w.status cr
;


\ send a data frame
: rfm12.tx.data ( xN .. x1 N -- )
  rfm12.tx.on
  $aa >w \ sync pattern
  $aa >w
  $aa >w
  
  $2d >w \ magic bytes
  $d4 >w

  $10 0 do     \ payload data
    i $30 + $b800 + w? >wc
  loop

  $b8aa w? >wc \ sync pattern
  $b8aa w? >wc
  $b8aa w? >wc

  rfm12.tx.off
;

\ receive a data frame
: rfm12.rx.clearfifo $ca81 >wc $ca83 >wc ;
: rfm12.rx.sync      $82c8 >wc ;
: rfm12.rx.data ( n -- )
  rfm12.rx.sync
  rfm12.rx.clearfifo
  hex
  w?
  \ read n Bytes
  ( n ) 0 do <w 2 u0.r space loop
;

\ fin