-- -- Program memory ROM implemented using a case statement. -- Its content was generated by the uCore cross compiler. LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; USE work.constants.ALL; ENTITY program_rom IS PORT (addr : IN program_addr; data : OUT inst_bus); END program_rom; ARCHITECTURE sim_model OF program_rom IS SUBTYPE rom_address IS NATURAL RANGE 0 TO 2**prog_addr_width-1; FUNCTION program(addr : rom_address) RETURN STD_LOGIC_VECTOR IS BEGIN CASE addr IS