-- Introduction see: information/uCore_Introduction.pdf -- Tools see: information/uCore_Implementation.pdf -- Versions see: uCore_Versions.txt -- License see: information/uCore_License.pdf -- Conventions see: information/uCore_Conventions.pdf -- Contributors see: information/uCore_Contributors.pdf -- -- Internal program memory RAM implemented using an array type. -- Used for memory initialisation during configuration -- Its content was generated by a cross compiler. LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_unsigned.ALL; USE work.constants.ALL; ENTITY internal_program IS PORT (clk : IN STD_LOGIC; en : IN STD_LOGIC; we : IN STD_LOGIC; addr : IN prog_addr; di : IN inst_bus; do : OUT inst_bus); ATTRIBUTE ram_style : STRING; ATTRIBUTE ram_style OF internal_program : ENTITY IS "block"; END internal_program; ARCHITECTURE inference_model OF internal_program IS ATTRIBUTE syn_ramstyle : STRING; TYPE inst_ram IS ARRAY (0 TO 2**prog_addr_width-1) OF inst_bus; SIGNAL program : inst_ram := (